Zettascale

Energy efficient chips for AI

Founding Engineer - Cluster/Hardware/Systems

$150K - $300K0.50% - 1.50%San Francisco, CA, US
Job type
Full-time
Role
Engineering, Hardware
Experience
1+ years
Visa
US citizen/visa only
Skills
CAD Design, Prototyping, PCB design, FPGAs, Altium
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Elias Almqvist
Elias Almqvist
CEO

About the role

We're Building the Next Generation of Chips to Power AI. Join Us.

At Zetta, we're building the next NVIDIA. Our novel polymorphic chips are a generation ahead of anything on the market. We're essentially building the substrate that will power all future knowledge and scientific discovery.

Our XPU chips are state-of-the-art AI compute engines capable of reconfiguring themselves to optimize the dataflow of each model (training & inference!) to be fast and efficient enough to support AGI, and eventually ASI, without requiring massive power infrastructure. Through our novel polymorphic architecture, we're achieving unprecedented performance gains over current SOTA GPUs while dramatically reducing energy consumption.

The team consists of exceptional engineers obsessed with pushing the boundaries of what's possible in computing and AI, and we're now seeking our next technical member!

You Are

  • Ready to go all-in and do the work of your life
  • Willing to be hardcore when pushing technical boundaries
  • A systems-level hardware engineer who thinks from chip pins all the way to the data center floor
  • Deeply passionate and obsessed with computing and AI
  • Hungry to build something that actually matters

Your Background (important in bold)

  • Background in Electrical Engineering, Mechanical Engineering, Engineering Physics, or equivalent field
  • Strong high-speed PCB design experience (high layer count, controlled impedance, stackup design, via optimization)
  • Signal integrity & power integrity expertise (SI/PI simulation, eye diagrams, S-parameter analysis, decoupling strategy, IR drop)
  • High-speed interface design (PCIe Gen5/6, CXL, DDR5/HBM, Ethernet 400G/800G, SerDes routing)
  • Proficiency with PCB toolchains (Altium, Cadence Allegro, KiCad, HyperLynx, Ansys SIwave/HFSS)
  • Cluster & system-level design experience (server/blade architecture, backplanes, rack-scale interconnect topologies)
  • Thermal & cooling expertise (air, liquid, and immersion cooling; thermal simulation; cold plate design; airflow modeling)
  • Power delivery design (multi-phase VRMs, high-current PDN, board-level power sequencing)
  • Bring-up & debug expertise (oscilloscopes, VNAs, TDR, BERT, JTAG, root-causing SI/PI/thermal issues on real boards)
  • Build/flow automation and tooling (Python, Tcl, Nix)
  • Work across PCB, mechanical, thermal, and system architecture to hit cluster-level PPA targets

Huge Plus If

  • Experience designing AI/HPC accelerator boards or systems (GPU servers, TPU pods, custom ASIC carrier boards)
  • Rack-scale & data center experience (OCP designs, NVLink/NVSwitch-class fabrics, optical interconnects, top-of-rack networking)
  • Liquid/immersion cooling deployment experience (cold plate design, CDU integration, two-phase cooling, leak mitigation)
  • DFM/DFT-aware PCB design (manufacturability reviews, test point strategy, boundary scan, bed-of-nails)
  • Experience writing/maintaining reusable hardware IP (reference designs, modular board architectures, well-documented schematics)
  • 2-5+ years (or equivalent) designing high-speed, high-layer-count PCBs for ASICs, GPUs, or networking gear
  • Mechanical/enclosure design experience (sheet metal, chassis design, working with ME/Industrial Design teams)
  • HW/SW boundary experience (board bring-up, BMC/firmware, telemetry, profiling, build systems)
  • Experience with systems programming (Linux drivers, low-level board management)
  • Experience with (Sci)ML frameworks (e.g., PyTorch/TinyGrad/JAX/Lux.jl)
  • Autodidactic polymath with a strong mathematical background
  • Someone who doesn't fret when faced with near-impossible technical challenges

The Opportunity

  • Be one of the first employees shaping a revolutionary technology
  • Work directly with the founding team of exceptional engineers at our San Francisco HQ
  • Own critical decisions that will influence the future of AI compute
  • Grow into a technical leader as we scale
  • Highly competitive compensation + significant equity

This is THE chance to do the work of your life. The chance to build something that will be remembered. To go hardcore on a technical moonshot that will actually matter for over 100 to 1,000 years.

About the interview

  1. Interview #1 (with one of the founders)
  2. Interview #2 (with the other founder)
  3. In-person technical interview (at our SF HQ)
  4. Done

About Zettascale

Building energy-efficient chips ("XPUs") for AI training and inference.

Our XPUs are reconfigurable, capable of optimizing the dataflow of each model, making them faster and more energy-efficient than the current SOTA GPUs on the market. This saves data centers billions in cooling and energy costs.

Zettascale
Founded:2024
Batch:S24
Team Size:4
Status:
Active
Location:San Francisco
Founders
Elias Almqvist
Elias Almqvist
CEO
Prithvi Raj
Prithvi Raj
Founder